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15583 discussions

by Dave McGuire

Ha, originally from Jon Wilson. Here it is: ---------------------------- Pertec Formatted Interface, compiled by John Wilson <wilson(a)dbit.com> from various drive manuals, 03-Oct-1999. Updated 17-Mar-2000. Two 50-pin cables, all odd pins are grounded, except for pins 1/3 on P2. All signals are active low. Signal source is indicated under "src" column, C=controller, D=drive. All transmitters are open-collector drivers which can sink 36 mA (e.g. 7438). All receivers are 74(LS)00 style, terminated with 220 ohms to +5 and 330 ohms to ground. Signals are active low. P1 connector: -pin- -name- -src- -description- 2 IFBY D formatter busy, set by trailing edge of IGO, clears when command finished (but you can send a new command as soon as IDBY clears) 4 ILWD C last word -- used to tell drive that this is the last word (well, byte really) to be written in this record, assert 300 nsec (min) before trailing edge of final IWSTR pulse (no particular hold requirement) 6 IW4 C write data b4 8 IGO C initiate command -- pulsed low for 1 usec (min) to start command. formatter address lines must be stable throughout the pulse and until IFBY drops. 10 IW0 C write data b0 (MSB) 12 IW1 C write data b1 14 (ISGL) D (selected drive fault on some drives, cleared by dropping and re-asserting IFEN) 16 ILOL C load on-line -- pulse starts load sequence on some drives 18 IREV C reverse 20 IREW C rewind -- 1 usec (min) pulse starts rewind, no IFBY or IDBY, so wait until IRWD=0 and IRDY=1. ignored if tape is at BOT (so IRWD and IRDY will already be as above). 22 IWP C write parity (odd) 24 IW7 C write data b7 (LSB) 26 IW3 C write data b3 28 IW6 C write data b6 30 IW2 C write data b2 32 IW5 C write data b5 34 IWRT C write 36 (IRTH2) C see IRTH1 38 IEDIT C edit 40 IERASE C erase 42 IWFM C write file mark 44 (IRTH1) C write density select on some drives, used in conjunction with IRTH1 to set write density (unless controlled by front panel), qualifies IGO on first write operation from BOT, ignored elsewhere 46 ITAD0 C transport address 0 (MSB) 48 IR2 D read data b2 50 IR3 D read data b3 P2 connector: (N.B. pins 1/3 are *not* grounds, so not paired with pins 2/4) -pin- -name- -src- -description- 1 IRP D read data parity (odd) (N.B., not a ground pin) 2 IR0 D read data b0 (MSB) 3 IR1 D read data b1 (N.B., not a ground pin) 4 ILDP D load point -- asserted whenever the tape is at the load point (or might as well be, as far as the controller needs to know -- there may be hidden repositioning) 6 IR4 D read data b4 8 IR7 D read data b7 (LSB) 10 IR6 D read data b6 12 IHER D hard error -- pulsed (during IDBY) when a hard data error (or illegal character in IRG) is seen 14 IFMK D file mark -- pulsed (during IDBY) when a tape mark is seen 16 IDENT D identification -- asserted while drive is actually reading the PE ID burst, dropped the rest of the time so it's up to the controller to catch it and remember. on 9610, this is CCG (check character gate) in NRZI mode -- sample during IRSTR to find out whether this char is a data char or part of a CRCC or LRCC check. 18 IFEN C formatter enable -- should normally assert this all the time, but drop it for 2 usec (min) to abort any command that asserts IDBY (I/O, search, but not rewind I guess) ASAP 20 IR5 D read data 5 22 IEOT D end of tape -- asserted whenever the tape is past the EOT marker, clears when you backspace past it 24 IRWU C rewind/unload (also called IOFL) -- 1 usec (min) pulse starts, same as IREW but sets drive off-line and unloads tape. F880 manual isn't clear whether you assert this signal alone or at the same time as IREW (says it "modifies" it). 9610 manual seems to say it's used alone. 26 INRZ D NRZI mode -- asserted when in 800 BPI mode on some drives 28 IRDY D ready -- tape is fully loaded (not in transition to/from off-line) and not rewinding, check this before starting any command 30 IRWD D rewinding -- asserted while tape is rewinding 32 IFPT D file protect -- asserted continuously when the tape doesn't have a write ring in 34 IRSTR D read strobe -- typical timing: pulses low for 200 nsec (min), data on IR0-7/IRP are set up 100 nsec (min) before leading edge, held for 200 nsec (min) after trailing edge, cycle time can be as low as 1.1 usec for GCR @ 100 IPS. Kennedy 9610 is different: setup=500 ns min, RSTR=340 ns min, hold=250 ns min. 36 IWSTR D write strobe -- pulsed low each time the drive is ready for another data byte to be written. timing depends on drive model -- example: IW0-7/IWP must be set up 300 nsec (min) before trailing edge, no hold requirement after. Kennedy 9610 is edge-triggered off the trailing edge, setup=500 ns, hold=250 ns. 38 IDBY D data busy -- asserted during I/O phase of read/write commands (generally starts a few msec after IFBY). 40 ISPEED D high-speed status -- asserted when command is executing in high-speed mode (starting at IDBY anyway) 42 ICER D corrected error -- pulsed (during IDBY) when a single- track dropout is successfully corrected (using the parity information) 44 IONL D online -- always asserted when online, clears within 1 usec of OFFLINE command 46 ITAD1 C transport address 1 (LSB) 48 IFAD C formatter address 50 IHISP C high speed select (also called IDEN) -- qualifies IGO (so must assert beginning 1 usec (min) before trailing edge of IGO, can drop any time afterwards) to select high-speed tape motion for this command Commands are started by setting up the IREV, IWRT, IWFM, IEDIT, and IERASE lines and then pulsing IGO. All kinds of crazy combinations of these signals are possible to get vendor-specific commands. The basic ones are: READ --- (nothing, just IGO) Reads the next record or dies trying. Data are supplied with IRSTR pulses as needed, watch ICER/IHER for errors, or IFMK etc. for other status. READ REVERSE IREV Reads the previous record, or just gives up if at BOT. As above, watch ICER/IHER/IFMK/etc. WRITE IWRT Writes a record, supplying IWSTR pulses to clock in data until the controller asserts ILWD. WRT FILE MARK IWRT+IWFM Writes one file mark. ERASE IWRT+IWFM+IERASE Erases 3" (or whatever) of tape. Used as part of a write retry sequence. SPACE FORWARD IERASE Like READ but with no IRSTR pulses. SPACE REVERSE IREV+IERASE Like READ REVERSE but with no IRSTR pulses. FMARK SCH FWD IWFM+IERASE Does SPACE FORWARD commands until file mark or EOT marker is reached. FMARK SCH REV IREV+IWFM+IERASE Does SPACE REVERSE commands until file mark or BOT marker is reached. On some drives, IEDIT modifies WRITE and READ REVERSE to allow (semi-)safely inserting records on an existing tape. READ REVERSE EDIT tells the drive to backspace slightly farther than usual into the preceding IRG, and WRITE EDIT tells the drive to turn the head current off slowly at the end of the record to avoid causing a glitch. Kennedy 9610/9660 chart: REV WRT WFM EDT ERS -command- 0 0 0 0 0 READ FORWARD 1 0 0 0 0 READ REVERSE 1 0 0 1 0 READ REVERSE EDIT 0 1 0 0 0 WRITE 0 1 0 1 0 WRITE EDIT 0 1 1 0 0 WRITE FILE MARK 0 1 0 0 1 ERASE VARIABLE LENGTH 0 1 1 0 1 ERASE FIXED LENGTH 0 1 1 1 1 DATA SECURITY ERASE 0 0 0 0 1 SPACE FORWARD 1 0 0 0 1 SPACE REVERSE 0 0 1 0 0 FILE SEARCH FORWARD 1 0 1 0 0 FILE SEARCH REVERSE 0 0 1 0 1 FILE SEARCH FORWARD (IGNORE DATA) 1 0 1 0 1 FILE SEARCH REVERSE (IGNORE DATA) 0 1 1 1 0 SELECT 800 BPI 0 0 1 1 1 SELECT 1600 BPI 1 0 1 1 1 SELECT 3200 BPI 1 1 0 0 0 SELECT 6250 BPI Streamers have a drive-dependent "reinstruct time" which is the size of the time window after completion of a command during which you can issue a new command w/o the drive having to reposition. Definitely a good idea to make the deadline if possible, if you can't then using IHISP will probably waste more time in repositioning than it will save in fast transfer speed. -- Dave McGuire, AK4HZ New Kensington, PA

3 years, 7 months

M7196

by Peter Lothberg

Anyone that has the print set of M7196 or just the pin out of the tape drive connectors? It's part of TSV05 tape subsystem. -P

3 years, 7 months

DECnet Phase V on VAX/VMS

by Trevor Warwick

I'm a recent joiner to HECnet, and wondered if anyone else has played around with Phase V software at all ? Obviously HECnet itself is a Phase IV network, but you can connect Phase V VAX endnodes using the Phase IV compatibility mode. All my systems are simulated with simh, and getting an Ethernet connection to work was very straightforward, there's just a bit more local configuration required than with Phase IV. However, I spent quite a few years at DEC working on VAX synchronous device drivers, so I was interested to see whether I could get a WAN connection going. The biggest issue was device support. DECnet-VAX Phase V doesn't support any of the older microcoded interfaces (DMC11, DMV11, KMX11 etc), and the later devices (DSV11, DSB32, DST32, etc) aren't supported by simh. The only intersection is actually the DUP/DPV11, where there was a new VMS driver (SEDRIVER) for Phase V, that replaces the individual protocol-specific drivers that were previously used with these devices. I've spent quite a long time this week dredging stuff out of memory from 30 years ago, and still failing to get a DPV11 link to come up, until I eventually realised that a) there are some significant differences between the DUP and DPV, and b) simh does not support the DPV properly (how is one supposed to know this?) ! So after changing my simulated microVAX into an 8600, and the DPV into a DUP, I've managed to get a DDCMP link to come up between this and a PyDecnet router. There still seem to be some rough edges, as it won't always come up until PyDecnet is bounced, and it's also a bit slow for interactive use, as if there's something that's only working on a retransmission, or timer expiry. Anyway, it's been a fun nostalgia exercise to get this far, I'll probably mess about with it some more. Let me know if you have any questions... TOGATH$ mcr ncl sho routing circuit ddcmp-0 adj * all Node 0 Routing Circuit DDCMP-0 Adjacency RTG$0001 at 2022-03-11-15:28:50.820+00:00Iinf Identifiers Name = RTG$0001 Status Type = Autoconfigured State = Up Neighbor Node Type = Phase IV Router Router NETs = { 49::00-1D:AA-00-04-00-D5-75:00 (LOCAL:.TWPD) } TOGATH$ mcr ncl sho modem connect line ddcmp-0 all Node 0 Modem Connect Line DDCMP-0 at 2022-03-11-15:29:33.660+00:00Iinf Identifiers Name = DDCMP-0 Status UID = 5AFC9FC0-A14A-11EC-8002-AA000400C475 State = On Interface State = Full Enabled Actual Speed = 0 Loopback Mode = Null Interface Type = Unknown Modem Type = "" Device Availability = Device Present Request to Send = Asserted Clear to Send = Asserted Data Set Ready = Asserted Data Terminal Ready = Asserted Carrier Detect = Asserted Signalling Rate Selector = Unknown Signalling Rate Indicator = Unknown Ring Indicator = Not Asserted Remote Loopback = Not Asserted Local Loopback = Not Asserted Test Mode = Unknown Characteristics Communications Port = DPV-0-0 Connection Type = NonSwitched Communications Mode = Synchronous Duplex = Full Profile = "" Modem Control = Full Modem Options = { } Encoding = Normal Clock = External Speed = 0 Alternate Speed = 0 Rate Select = High Maximum Enable Transmit Timer = 2000 Suppress Test Indicator = True Transmit Holdoff Timer = 0 Carrier Loss Timer = 15000 Minimum DTR Deassertion Timer = 2000 Maximum Disable Transmit Timer = 500 Call Accept Timer = 0 Successful Call Indication Timer = 30 Maximum DSR Deassertion Timer = 5000 Counters Creation Time = 2022-03-11-14:48:46.780+00:00Iinf Losses of Clock = 0 Cable Faults = 0 Times DCE Not Ready = 0 Transmit Enable Timeouts = 4 Losses Of Carrier = 0 Rate Fallbacks = 0 Test Indications = 0 Framing Errors = 0 Times Cable Detected = 0 Device Errors = 0 Times Reset = 4 c CTF V1.0-00 Page 1 Trace started on 11-MAR-2022 15:45:28.40 Analyzed on 11-MAR-2022 15:45:56.95 Trace File DUA1:[TREVOR]CTF$TRACE.DAT;3 Output File DUA1:[TREVOR]XX.TXT;4 -----------+----+-----+<--------DDCMP Frame-------->+--------------------------` Time |Evnt|Data | Typ QS Res Num Ctl Adr Count|Data ` hh mm ss cc| |Size | | ` -----------+----+-----+<--------------------------->+--------------------------` 15:45:28.40| Tx| 85| DAT S 77 86 1 77| 0A C5 75 C4 75 01 21 35 E` | 01 04 C3 02 EE 81 C6 01 2` | 2E 30 85 02 03 E8 C4 01 0` 15:45:28.41|Rx | 22| DAT 85 78 1 14| 05 D5 75 0A AA AA AA AA A` 15:45:28.56|Rx | 6| ACK 86 1 | 15:45:28.57| Tx| 6| ACK S 78 1 | 15:45:32.80| Tx| 85| DAT S 78 87 1 77| 0A C5 75 C4 75 01 21 35 E` | 01 04 C3 02 EE 81 C6 01 2` | 2E 30 85 02 03 E8 C4 01 0` 15:45:32.81|Rx | 62| DAT 86 79 1 54| 02 C4 75 C5 75 02 21 2E D` | 01 04 C6 01 23 01 11 30 3` | 03 E8 15:45:32.81| Tx| 25| DAT S 79 88 1 17| 02 C5 75 C4 75 01 21 09 6` 15:45:32.82|Rx | 6| ACK 87 1 | 15:45:32.94|Rx | 6| ACK 88 1 | 15:45:32.95|Rx | 62| DAT 88 80 1 54| 02 C4 75 C5 75 02 21 2E D` | 01 04 C6 01 23 01 11 30 3` | 03 E8 15:45:33.07| Tx| 6| ACK S 80 1 | 15:45:38.48|Rx | 31| DAT 88 81 1 23| 02 C4 75 C5 75 02 21 07 F` 15:45:38.48| Tx| 40| DAT S 81 89 1 32| 02 C5 75 C4 75 01 21 07 F` | 00 00 00 00 00 00 15:45:38.49|Rx | 31| DAT 88 82 1 23| 02 C4 75 C5 75 02 21 07 F` 15:45:38.49| Tx| 25| DAT S 82 90 1 17| 02 C5 75 C4 75 01 21 09 6` 15:45:38.50|Rx | 6| ACK 89 1 | 15:45:38.60|Rx | 6| ACK 90 1 | 15:45:39.72|Rx | 58| DAT 90 83 1 50| 02 C4 75 C5 75 02 21 07 F` | 00 00 00 00 00 00 01 02 1` 15:45:39.72| Tx| 25| DAT S 83 91 1 17| 02 C5 75 C4 75 01 21 09 6` 15:45:39.73| Tx| 25| DAT S 83 92 1 17| 02 C5 75 C4 75 01 21 09 6` 15:45:39.73| Tx| 80| DAT S 83 93 1 72| 02 C5 75 C4 75 01 21 07 F` | 00 00 00 00 00 00 01 02 F` | A0 13 00 30 02 30 60 F9 0` 15:45:39.73| Tx| 38| DAT S 83 94 1 30| 02 C5 75 C4 75 01 21 07 F` | 00 00 00 00 15:45:39.73| Tx| 49| DAT S 83 95 1 41| 02 C5 75 C4 75 01 21 07 F` | 00 18 00 42 70 50 00 A0 1` Buffer: XX.TXT | Write | Insert | Forward

3 years, 7 months

TOPS-20 boot camp for VMS users

by Robert Armstrong

I thought some of the HECnet crowd might find this interesting https://groups.google.com/g/alt.sys.pdp10/c/WnsETCDyTmc "TOPS-20 Boot Camp for VMS Users 05-Mar-2022" (that's this Saturday), and they'll even give you an account on a real (not simulated!) 36 bit machine, an XKL Toad. Bob

3 years, 7 months

The domain Update.UU.SE...

by Johnny Billquist

Seems to not work anymore. Not sure if it is permanent. But anyway, for anyone wanting to reach Mim, as has been announced before, she's still available as Mim.Stupi.NET. Johnny -- Johnny Billquist || "I'm on a bus || on a psychedelic trip email: bqt(a)softjar.se || Reading murder books pdp is alive! || tryin' to stay hip" - B. Idol

3 years, 8 months

Mailman Question When Using a Forwarding Service

by Rob Jarratt

Hello Everyone, Are there any Mailman experts here? The way I use my email addresses is that I have an email address provided by my ISP (Robert.jarratt(a)ntlworld.com <mailto:Robert.jarratt@ntlworld.com> ), but I use an email forwarding service to forward rob(a)jarratt.me.uk <mailto:rob@jarratt.me.uk> to my ISP mailbox. This means that I can receive email sent to rob(a)jarratt.me.uk <mailto:rob@jarratt.me.uk> , but any email I send comes from Robert.jarratt(a)ntlworld.com <mailto:Robert.jarratt@ntlworld.com> . I do put rob(a)jarratt.me.uk <mailto:rob@jarratt.me.uk> in the reply-to. Can Mailman be configured to accept emails from my outbound address, but send them to my forwarding address? I would like to do this for my subscription to the HECnet list, if possible. If I can't then so be it, but I thought it worth asking. Thanks Rob

3 years, 8 months

Re: [Hecnet] HECnet mail list move

by Rob Jarratt

Hello Johnny, I am not sure if I did get two copies of this email so I don't know if I am on the new system. I don't remember what email I would be registered under, it will either be rob(a)jarratt.me.uk (preferred) or Robert.jarratt(a)ntlworld.com. I don't want to create an account to manage myself until I know which email (if any) I am registered with in the new system. Would you mind checking for me please? Thanks Rob > -----Original Message----- > From: Johnny Billquist <bqt(a)softjar.se> > Sent: 21 January 2022 01:10 > To: hecnet(a)lists.dfupdate.se; hecnet(a)Update.UU.SE > Subject: [Hecnet] HECnet mail list move > > Ok. Since I'm a busy (and lazy) bum, this have taken way more time that it > should have. > > But here it is. The HECnet mailing list is moving. It has to. > First of all, hats off, thanks, and apologies to Bob Armstrong and Dave > McGuire. They both offered to help move the mailing list, and put time into > it. Unfortunately, I've not had time to really work on it, and in the end the > people at Update also worked on migrating all other stuff that was running > there, which included various other mailing lists as well, so the HECnet > mailing list was more or less able to be moved without any work on my part, > except for some tweaks to settings. > > So while much of Update is, for the time being, turned off, the mailing list can > live on. > > The address do change, however. As you can see. The new address is: > > hecnet(a)lists.dfupdate.se > > This is now running under mailman, which do mean that there is a web > interface for people to control their subscriptions, as well as the possibility of > digests and archives going forward. > > All current subscribers are already subscribed at the new address. If anyone > disagrees with that, they can unsubscribe, or let me know and I'll unsubscribe > them. > > I'm sending this mail to both the old and new list, so everyone should get two > copies of this mail. If you are not, check possible spam boxes, and let me > know if I should investigate something on my side. > > The web page for the list is: > https://lists.dfupdate.se/postorius/lists/hecnet.lists.dfupdate.se/ > (I think I got that right, let me know otherwise) > > Johnny > > -- > Johnny Billquist || "I'm on a bus > || on a psychedelic trip > email: bqt(a)softjar.se || Reading murder books > pdp is alive! || tryin' to stay hip" - B. Idol > _______________________________________________ > Hecnet mailing list -- hecnet(a)lists.dfupdate.se To unsubscribe send an email > to hecnet-leave(a)lists.dfupdate.se

3 years, 8 months

Weird microcode bug in the 11/60 CPU

by pbirkel＠gmail.com

Johnny; I would be interested in hearing more about this (or any) 11/60 microcode bug :->! And how the OS (which?) worked around it. >>> Subject: [HECnet] Re: KG11 emulation probably defective -->diagnosticZKGAB0for KG11 runs without complaints. ..... There is a weird microcode bug in the 11/60 CPU, which force the OS do so some silly things in general, in order to run correctly one that one CPU. Things that are just wasting a few cycles on all other CPUs. I bet DEC had fun figuring that one out... (I don't remember the exact details now, but I could go in and read the code to find out again, if needed, unless someone else remember the specifics.) Johnny -- Johnny Billquist || "I'm on a bus || on a psychedelic trip email: bqt(a)softjar.se <mailto:bqt@softjar.se> || Reading murder books pdp is alive! || tryin' to stay hip" - B. Idol _______________________________________________ HECnet mailing list -- hecnet(a)lists.dfupdate.se <mailto:hecnet@lists.dfupdate.se> To unsubscribe send an email to hecnet-leave(a)lists.dfupdate.se <mailto:hecnet-leave@lists.dfupdate.se>

3 years, 8 months

DEC hardware for grabs in NL

by Wilm Boerhout

A friend of mine has a bunch of hardware that needs a new home. No charge, but it has to be picked up in Zoetermeer, The Netherlands. He asked me to post it here, if you are interested I will get him to contact you. Rgds, Wilm Servers * AlphaServer 1000A * Power supply defect, stops 1 sec after sdtartup * Status unknown * DEC 2000 Model 300 AXP, aka DECpcAXP150, aka Jensen * working (front panel damaged) * Internal disk RZ28B (2.1 G) * Internal disk RZ26L (1.05 G) * RRD44 CD drive * RX26 floppy drive, not working Storage Shelves * 2x BA356-RC (blue) * 1x BA356-SB (beige) * 5x Power supply * 2x I/O module BA35X-MH (70-31490-01) * 1x I/O module BA35X-MG * 1x BN21W-0B Y-connector Disks * 6x RZ1FC-VW (36.4 G) * 4x RZ1ED/EF-VW (18.2 G) * 3x RZ1DA/DB-VW (9.1 G) * 11x RZ1CB/CF-VW (4.3 G) * 4x RZ29B-VA/VW (4.3 G) * 2x RZ28-VA (2.1 G) Tape Drives * 1x TZ89, rack mount * 2x TZ88 rack mount

3 years, 8 months

Re: KG11 emulation probably defective -->solved (by Paul as it is) --> from the KG11 drawings; issue closed

by R. Voorhorst

Actually, the wiring is slightly more complex as the counter is reset by the bus init signal on the clr inputs, however the load signal presets the counter to a value depending on the selected polynomial. The counting in hardware is even more complex as the counter is a 1 bit binary counter combined with a 3 bit binary counter to cover the range from 8 to 12 to 16 steps clocking and varying between 10 Mhz and single stepping to develop the Done flag setting which freezes the clock generator which is a gated oscillator. But since the implementation of Simh does not follow the hardware but only replaces it with a functional equivalent, the software counting is implemented differently and then it suffices to clear the pulsecnt variable per the second proposed solution. Reindert -----Original Message----- From: Paul Koning [mailto:paulkoning@comcast.net] Sent: Wednesday, 02 February, 2022 15:44 To: Reindert Voorhorst <R.Voorhorst(a)swabhawat.com> Cc: HECnet <hecnet(a)lists.dfupdate.se> Subject: Re: [HECnet] KG11 emulation probably defective -->solved (by Paul as it is) > On Feb 2, 2022, at 4:09 AM, R. Voorhorst <R.Voorhorst(a)swabhawat.com> wrote: > > L.S. > > So in the end I had little to do J (thanks Paul and Johnny), and the updated code by Paul fixes the problem and yes, the diagnostics still complete without complaint. A check of the engineering drawings should verify/confirm how the pulse count is actually terminated/reset in hardware. From the manual (which reproduces a bit of the schematic in support) the more precise definition is that the counter is reset by a data register load. That would make a difference in observable behavior if single step mode is used: DONE would come on after the correct number of single step operations. I'll submit a PR with that version. Thanks Reindert for verifying the fix. paul

3 years, 8 months

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