11 Apr
2026
11 Apr
'26
5:50 p.m.
Keith Halewood <Keith.Halewood(a)pitbulluk.org>
wrote:
... The VAX Vector Instruction Emulation Facility (VVIEF) is a standard
...
That's kind of neat. Thanks for checking this out. Is the option to
generate the vector instructions standard in the VMS FORTRAN compiler?
That's the only thing DEC ever produced that used the vector processor,
right?
The emulator would be fun for playing with the compiler, but it's probably
not very useful otherwise. I imagine emulating vector instructions without
the hardware is probably slower than just letting the compiler generate code
the normal, non-vector, way.
Bob