11 Apr
2026
11 Apr
'26
6:02 p.m.
On 4/11/26 11:50, Robert Armstrong wrote:
Seconded, thanks Keith. Very neat indeed.
Keith Halewood
<Keith.Halewood(a)pitbulluk.org> wrote:
... The VAX Vector Instruction Emulation Facility (VVIEF) is a standard
...
That's kind of neat. Thanks for checking this out. Is the option to
generate the vector instructions standard in the VMS FORTRAN compiler?
The capability is built into the standard FORTRAN compiler. Try this:
fortran/vector/list/show-loops <file>
...and the resulting listing file will tell you about, for example,
loops that the compiler was able to vectorize.
That's the only thing DEC ever produced that used
the vector processor,
right?
As far as I've been able to find. I'd love to be proven wrong on that.
The emulator would be fun for playing with the
compiler, but it's probably
not very useful otherwise. I imagine emulating vector instructions without
the hardware is probably slower than just letting the compiler generate code
the normal, non-vector, way.
I'd bet on that, yes.
-Dave
--
Dave McGuire, AK4HZ
New Kensington, PA