11 Oct
2022
11 Oct
'22
3:11 p.m.
On Oct 10, 2022, at 9:12 PM, Dave McGuire
<mcguire(a)neurotica.com> wrote:
Hey folks. This is a bit OT. I've been attempting to build APL-11 for a machine
with neither FPP nor FIS, and have hit a wall. I get multiple "Z" errors from
the assembler, which is flagging instructions whose behaviors differ between PDP-11
models.
Has anyone built this from source for something without FPP/FIS? This is driving me
nuts.
I have never seen those sources, let alone tried to build them.
Z errors may well be acceptable. The thing to do is examine the code to see what it wants
to happen, then check the model differences appendix B of the PDP11 architecture handbook
to see if your target machine does what is wanted. The primary source of Z errors I
remember is the use of the same register in an autoinc/autodec mode and as a direct source
operand; in some machines, both operand addresses are determined first and then the source
register is fetched; in others, the source is handled, then the destination. See page B-2
of the architecture handbook.
Of course another option would be to replace the offending instruction by 2-instruction
sequences that achieve the intended result without Z errors.
paul