On 2015-04-26 22:14, Cory Smelosky wrote:
On Sun, 26 Apr 2015, Johnny Billquist wrote:
All true and good points.
I'm curious on exactly how a DEUNA/DELUA works in a KS-10. Does
anyone know? Does it do 8-bit-byte DMA to the 18-bit memory, leaving
the top two bits alone. Or does it only work if it do word DMA (would
be strange, as the controller itself can send and receive odd byte
length ethernet packets).
And how does the whole controller actually work in a KS, since the
controller expects there to be control structures in memory, which
are used to manage the buffers. Those are expected to be 16-bit
fields at one address, and an additional 2 bits of address in another word.
Is there some potential problem with regards to a PDP-11, which have
two parity bits for data, which are used for actual data on a KS? (If
I remember right.)
How does the DZ do it? THAT I know is a supported.
Haha... DZ don't do DMA. :-)
There is a reason it is a very disliked peripherial...
In short,
this is not trivial, and if it works on a real machine, the
emulation needs to reflect that truthfully, or else it will not be so
useful. I suspect it should work on a real machine, as hints
suggested that it was at least considered.
Could always do "emulation mode" and "real hardware mode".
Definitely doable, but if you go down that path, why even make it somewhat
similar to a DEUNA/DELUA? Then you might as well provide a controller with
way more functionality...
I don't think there is any special details needed. The existing KS10 Unibus DMA seems
to do the right thing already. This works for at least the KMC, and DMC. The fact that
Cory can read packets from the wire strongly suggests that no special details are needed
(at least yet).
Since there is already existing code (in this IP stack) that knows how to actually talk
through the DEUNA, I'll put it back into the PDP10. What BUS address and VECTOR
values are the defaults for the existing IP stack?
- Mark