On 2013-01-17, at 10:20 PM, Dave McGuire <mcguire at neurotica.com> wrote:
I'd do it with an HDLC/SDLC-capable chip like a Z8530...offload as
much from the firmware as possible, leave those cycles for protocol
handling. Unless you meant wrapping bare ?DLC frames in packets?
I was thinking that we don't even need to decapsulate the serial frame at all - just
detect the start and end. All we're doing is emulating a piece of wire, after all.
Unless we're putting in a fancy LCD status display, but I think that's overkill.
Wrapping the data in UDP is simple. The HDLC layer could deal with
error detection/correction.
Yes!
The problem is finding surplus time to embark on this. Maybe a few
of us could collaborate on it?
I have that problem as well, but I got really excited when you
mentioned it, because I am doing a lot of designs with Ethernet now. I
have a "base" design, a "hardware macro" if you will, that I've
recycled
several times. It's a Philips..erm, NXP LPC2300-series ARM7 with an
on-chip Ethernet MAC, and all supporting hardware. I typically run
FreeRTOS and uIP on them.
The only things I have dev platforms are on my end are PIC and Atmel. I have some Zilog
stuff, but I gave up on them several years ago. However, if you're able to put
together the hardware layer, and there's a C compiler available for your platform, I
can help on the software side. I've also done some software work for a local company
that uses a TI Davinci processor.
Interfacing an ?DLC engine to that would be a cakewalk starting from
that base design as a head-start. I have a few tubes of Z8530s in
PLCC-44 packages here.
Oh oh. I think there's another project starting... :)
-Dave
--
Dave McGuire, AK4HZ
New Kensington, PA
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